With the rapid development of the semiconductor manufacturing technology, process nodes keep shrinking. Thus, the gate last technique is widely used to obtain an ideal threshold voltage and to improve device performance. However, as the device feature size is further decreasing, the traditional MOSFET structures made by using the gate last technique may no longer satisfy the performance requirement. Thus, multigate device as a substitute to the conventional device draws great attentions. FinFET is a typical multigate device, and is widely used.
Further, as the feature size of the silicon-based device is shrinking, due to restrictions from the silicon material itself, performance of the silicon based device may be unable to be further improved effectively. But by combining certain high performance materials with the silicon, for example, using a layer made of the group III-V materials on the surface of the silicon substrate as a transistor's channel material, the carrier mobility may be enhanced and the driving current may be increased. Thus, performance of the semiconductor device may be further improved. Compared with a FinFET using the silicon material as a channel layer, a FinFET using the group III-V materials as the channel layer may have better performance.
However, because the group III-V materials may have significantly different lattice from the silicon substrate, the group III-V materials layer formed directly on the silicon substrate using an epitaxy process may have a significant high defect density. Thus, the performance of the formed FinFET may be impacted. The disclosed methods are directed to solve one or more problems set forth above and other problems.